Differential clock drivers are normally used to drive relatively small loads. Capacitive coupling is widely used to enable high data or clock rate interconnection between circuits, such as integrated circuits (ICs). Capacitive coupling (by use of coupling capacitors) typically simplifies circuit design by blocking direct current (D.C.) biasing from being superimposed at output lines, and thus, being supplied to a load. Capacitive coupling also can be used to isolate ground connections between subsystems for noise isolation purposes. However, although capacitive coupling is beneficial when used, for instance, in a differential clock driver circuit, their supply voltage charge to zero voltage discharge may affect the bandwidth of the driver. To overcome this potential bandwidth restriction, differential clock drivers can be configured to have increased peak currents at their outputs to thereby more rapidly charge and discharge their coupling capacitors. As a result, prior art differential clock drivers coupled to respective loads by respective coupling capacitors are typically configured and operated by compromising between clock speed, signal quality and power consumption.
Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the present invention.